paperAI

A Low-Power Mixed-Signal Differential In-Memory Matrix–Vector Computing Circuit Architecture with RISC-V Control for Edge AI

A Low-Power Mixed-Signal Differential In-Memory Matrix–Vector Computing Circuit Architecture with RISC-V Control for Edge AI

publishedDate Venue Journal of Low Power Electronics and Applications

Source-permitted summary

A Low-Power Mixed-Signal Differential In-Memory Matrix–Vector Computing Circuit Architecture with RISC-V Control for Edge AI

SourceMultidisciplinary Digital Publishing Institute

AI Reading Notes

Core signal

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Core signal
A Low-Power Mixed-Signal Differential In-Memory Matrix–Vector Computing Circuit Architecture with RISC-V Control for Edge AI
Field context
Compute and Hardware
People and labs
Not stated in the reviewed source.
Why it matters
Recent source-backed research output for AISci Stage A browsing.
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AISci rank score does not assess scientific quality or citation impact.

Publication facts

Venue
Journal of Low Power Electronics and ApplicationsSourceMultidisciplinary Digital Publishing Institute

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Timeline

  1. paperA Low-Power Mixed-Signal Differential In-Memory Matrix–Vector Computing Circuit Architecture with RISC-V Control for Edge AI